Due to iterative matrix multiplications or gradient computations, machine learning modules often require a large amount of processing power and memory. As a result, they are often not feasible for use in wearable devices, which have limited processing power and memory. In this study, we propose an ultralow-power and real-time machine learning-based motion artifact detection module for functional near-infrared spectroscopy (fNIRS) systems. We achieved a high classification accuracy of 97.42%, low field-programmable gate array (FPGA) resource utilization of 38354 lookup tables and 6024 flip-flops, as well as low power consumption of 0.021 W in dynamic power. These results outperform conventional CPU support vector machine (SVM) methods and other state-of-the-art SVM implementations. This study has demonstrated that an FPGA-based fNIRS motion artifact classifier can be exploited while meeting low power and resource constraints, which are crucial in embedded hardware systems while keeping high classification accuracy.

In embedded biomedical applications, spectrum analysis algorithms such as Fast Fourier Transform (FFT) are crucial for pattern detection and has been the focus of continued research. In deeply embedded systems such as cardiac pacemakers, FFT based signal processing is typically computed by Application Specific Integrated Circuits (ASIC) to achieve low power operation. This research proposes a data driven design approach for an FFT ASIC solution which exploits the limited range of data encountered by these embedded systems. The optimizations proposed in this paper uses the simple concept of Hashing and Look-Up Tables (LUT) to effectively reduce the number of arithmetic operations required to perform the FFT of an electrocardiogram (ECG) signal. By reducing the dynamic power consumption and overall energy footprint of FFT computation, the proposed design aims to achieve longer battery life for a Cardiac Pacemaker. The design is synthesized using a 90nm standard cell library, and gate level switching activity is simulated to obtain accurate power consumption results. The proposed optimizations achieved a low energy consumption of 27.72nJ per FFT, which is 14.22% lower than a standard 128-point radix-2 FFT when tested with actual ECG data collected from PhysioNet.

This paper presents a 15-channel, 30-V, implantable current stimulator for restoring locomotion control after spinal cord injuries. The stimulator features performance specifications comparable to those of large desktop instrumentation: high linearity, high precision of the delivered currents, small channel-to-channel mismatches and a fast settling time of 0.3 μs. An ADC-based active charge balancing scheme using a digital PI (proportional-integral) controller was implemented in firmware.